I have a 137kHz amateur band RF amp built to this schematic and it works beautifully with the same designers LPF. The gate and drain waveforms are excellent. I built the MF version and I am having a nightmare with it. Poor gate and spiky drain waveforms took out many FET's. I replaced the driver IC with a pair of 14 Amp capable devices, probably overkill, but there we are. The original was known to be marginal driving the gate capaciatnce of paralleled pairs of FET's and indeed it got pretty hot. I still had issues with dead FET's and poor waveforms. I then changed the flip flop to a CD74HCT74 which is being adequately driven. I feed in a signal from a si5351a PLL clock generator chip at 2X the desired output frequency, so the flip fglop is dividing circa 951kHz down by half to the FET driver.

My first questions are in regard to the waveforms linked to below.

Unfortunately I cannot just
ignore this and put it down to aesthetics of the waveforms. I am
seeing drain spikes going above the max drain voltage and FET's are
being killed. Let's take this gate and
drain waveform. The capture was of a period where the spikes were
certainly not at their highest or most frequent, either. And what can
cause the gate voltage to go negative, I am certainly not using a FET
driver IC designed to drive the gate negative at turn off for silicon carbide FETs


The other anomaly is dropping the Vcc voltage to either an HEF4013 flip
flop or a trial with a CD74HCT74 flip flop results in much better
drain waveforms without the spiking. This improvement occurs just
before the voltage is low enough for the flip flop to shut down....
The file names should be self explanatory I think. Thanks again.

The amp schematic pre my trial mods is here:


and the LPF is shown at:


Many thanks to anyone who can make suggestions!

As a comparison this is the similar 137kHz version of this amp's gate and drain waveforms, which I consider very good, and it runs cool with no issues at all for 24 hour periods at 1kW output on 52V.