Full bridge SMPS

[Marko]

Hello everybody!

Let me first introduce myself. I am an electrical engineering student, working on SMPS.

In attached pictures you can see my schematic. I am using PWM driver TL494 for generation of 50 kHz/40% duty cycle signal that is going further on full bridge driver IRS2330. IRS2330 is driving four MOS transistors IRFP450. Those transistors are connected to primary of ETD49 core and power supply for primary is controlled and rectified by variac (Vdc). On the secondary I have charge pump that is generating high voltage. I measure high voltage with resistor divider and regulate it with schmitt trigger. That means when voltage reach recommended value, the output of schmitt trigger goes from 0 to 12V. Output of schmitt trigger is connected to pin 3 of TL494, so it turns out driving of FETs and voltage is being regulated that way.

Everything (regulation & signal shapes) works fine as far as the voltage on transistors (Vdc) is below 150V. When I start lifting the voltage from 30V up, the voltage on floating channel of IRS2330, that is voltage between Vb1 and Vs1, starts falling down, and when I reach cca 150V the IRS2330 is destroyed (floating channel only).

Does anybody know what is the reason that voltage on floating channel is falling down with rising the Vdc voltage? Or what could possibly be the reason for destroying the IRS2330?

I tried to put the push-pull circuit between IRS2330 and gates of transistors but it didn't improve the circuit.

If anybody have suggestions or similar experience, please feel free to write them.

Marko

 

[vorezky04]

Use IR2153 running at 70Khz..

 

[wally7856]

I see a few things to look at for your problem of burning out the high side drivers in the IRS2330 3 phase driver.

http://www.irf.com/product-info/datasheets/data/irs2330pbf.pdf
3-PHASE-BRIDGE DRIVER

According to the spec sheet you need the external bootstrap diode for this chip.

“Note: IRS2330 & IRS2332 are without integrated bootstrap diode.”

Your schematic has the diode labeled as UF1G 400V and spec-ed as 1A 50nS. I think this is fast enough and has plenty of current capacity.

http://www.farnell.com/datasheets/64582.pdf
UF1G 400V

However the irs2330 spec sheet also references this spec sheet.

http://www.irf.com/technical-info/designtp/dt04-4.pdf
Using monolithic high voltage gate drivers.

This AP note specifies that you should have a bootstrap resistor in series with the bootstrap diode. I have seen 33 ohm resistors used in other applications.

“Bootstrap Resistor is placed in series with bootstrap diode (see figure 1) so to limit the current when the bootstrap capacitor is initially charged. The choice of bootstrap resistor is strictly related to VBS A resistor time-constant. The minimum on time for charging the bootstrap capacitor or for refreshing its charge must be verified against this time-constant. “

There is also information on how to calculate the bootstrap capacitor. I usually see people use ceramic capacitors one to 2uF in size.

Also on page 15 of this AP note it says to use a clamping diode for Vs. This looks like it is very relevant to your problem.


Another AP note referenced has more theoretical information on bootstrap operation and is a tough read.

http://www.irf.com/technical-info/appnotes/an-1123.pdf
Application Note AN-1123
Bootstrap Network Analysis: Focusing on the
Integrated Bootstrap Functionality

Back in the original irs2330 spec sheet on page 24 in “Routing and Placement” there is a warning about negative spikes and placing a resistor and diode to suppress them. It also talks about board layout and parasitic voltages. Board layout is critical and can easily cause any of the chips used in the power section to get burned out.

There is one other thing i can think of. Some IR driver chips benefit from having 220 ohm resistors placed in the logic lines from the PWM control. In your case on pins 2,6 and 3,5 back to the PWM control chip.

 

[Marko]

Thank you both for fast reply.

vorezky04: I studied IR2153 before and it could not work for my case because the duty cycle must not exceed 80% (two signals with 40% duty cycle each). Transformer have to take his time to reset magnetic field in those 20%. And windings are calculated for frequency 50 kHz.

wally7856: You reminded me about few ideas that I thought they are not so important, such as bootstrap resistor. I thought it is better to fill capacitor as quick as possible than slow it down with resistor. Clamping diode is another thing that is the best to try and see the difference. And about layout I was careful to make connections as short as possible with minimum loops and creepage and clearance distances adequate.

I will test the circuit and report improvements.

Thank you both again!

Marko