IR2153 waveforms

Gavin

New member
Hello everyone.. new to this forum and found it like many I guess because im having a few difficulties with an IR2153 based 20KHZ SMPS. The circuit im building is designed to drive a neon sign. I have my 10KV @30mA output transformer and are successfully driving neon without any real issues... Fets remain cool ( IRF840) and power supply appears to be stable. But... im not getting the waveforms from the LO side DRIVE that I would expect. I was expecting a nice 50/50 square wave but am instead getting one that appears swollen. Top of waveform is flat ( with a little noise) but the "off" time is instant. I thought maybe this was due to the Bootstrap cap being too high or low, but having explored this theory, I find it is not the case. Anywhere between 10nf and 820nf doesn't make any difference.. drop down to 100pf and the power supply doesn't "strike" the neon and so it doesn't work.
Pic of waveform attached.. any pointers as to why im getting this shape would be greatly appreciated.
 

Attachments

  • Fet waveform.jpg
    Fet waveform.jpg
    883.9 KB · Views: 90

Gavin

New member
Waveform is at Lo Drive.. I was expecting something a bit squarer here that resembles the Gate waveform more.. I am assuming that the shape is due to the inductive load, but this is a guess and some clarification would be very helpful.
The squarewave on the HI Gate is another story as its a total mess and excuse me if this is a dumb question, but I thought both outputs from the 2153 should be the same.
Frequency is 20KHZ and im using a BA159 diode with a 100nF cap
 

blasphemy000

New member
A couple things could be causing this. I've only ever seen this sort of waveform when using a gate-drive transformer(not enough drive power) though, so keep that in mind when reading my post. At a slower speed of 20kHz, 100nF for your bootstrap capacitor seems very small to me, to be able to provide drive power to the high-side FET for that long of a period([50uS/2] - 1.2uS(dead-time) = 23.8uS). I'm assuming that the image of your waveform is 5V/div, so close to 15V drive voltage seems fine. I know when using an IR2110 @ ~25kHz I used bootstrap caps from 1uF up to 10uF depending on the dead-time and maximum duty cycle. It is also recommended that you place a cap that is 10x(so 10-100uF) the value of your bootstrap cap across VCC/Gnd to aid in charging the bootstrap cap faster during the time that Vs is pulled low. This is in addition to the normal low value bypass cap that would be across VCC/Gnd. Also, that BA159 seems to have a fairly slow Trr(Reverse-Recovery Time) of 500nS when compared with the rise-time of the IR2153 outputs(Typically 80nS, although the rise-time at the Vs node would be slower due to the switching time of the FETs), and could be leaking current spikes back into the VCC supply causing problems(this is only speculation). I usually use either a BYV26C(600V/30nS) or BYV26E(1000V/75nS) diode to provide the bootstrap current.

Finally, you are correct that both driver outputs(LO and HO) should have very similar wave shapes. I think what MicrosiM was getting at with his question was; where exactly are you probing your circuit when you measured that waveform? I know you said that this is the waveform for the LO drive of the IR2153, but are you connecting your probe directly at the pins of the IC(across LO and Gnd) or are you connecting the probe across G-S of the FET? Depending on the length of the PCB traces between the IC and the FET and the components you may have placed along that path(gate resistor, reverse diode to accelerate turn-off of the FETs, ect.), the waveforms can be different depending on the probing location. Also, you said that the waveform on the HO gate drive is a total mess. How are you probing that? Are you probing it properly using an adequate differential probe or are you probing it by some other means such as a 100x probe, or two channels with 100x probes and subtracting the channels with the Add/Invert function of the scope. How long is your ground lead on your scope probe? Long ground lead length mostly causes problems when probing much higher frequency signals, but it can also cause problems when probing signals with fast rise/fall times as well.
 

Gavin

New member
Thank you for the reply.. plenty of information for me there.
Im not using a gate drive transformer but I do have the whole board on a 125V 1A transformer for safer testing rather than implementing mains potential. Gates ( IRF840) are fed via a 15R
Bootstrap values are great info.. and no, I didn't know that I had to have 100X value across VCC and Gnd.. so much information out there and at the same time so little!
Im using the probe from cct ground (-ve DC).. Trigger is extremely sensitive.
PCB traces??... I wish I had got that far. Drive circuit is on proto board as im trying to develop a stable driver first and then add frequency control, safety features etc.
I have the feeling im about to be told this is the wrong way to go about an HF driver
 

Gavin

New member
Thanks to the replies ive had on here ive rebuilt the driver with a few changes. Results are the same waveforms at both DRAIN outputs. I now have a perfectly balanced supply to my HV transformer. Thank you!
 

Gavin

New member
Well im still not out of the woods.. is there anywhere here that I can post my schematic without it being in the public domain?
 

MicrosiM

Administrator
Staff member
Well im still not out of the woods.. is there anywhere here that I can post my schematic without it being in the public domain?


You can attach it directly to this forums, you can do that by --> Go Advanced
 

Gavin

New member
cct.jpg

Here is the circuit im using.
If I remove the whole output section I get a good square wave when pin6 is grounded as I should.

Here is the waveform I get at DRAIN on both Fets with trigger on -ve rail... wave is approx. 175V at 10msec. My oscillation on the 2153 is set for a tad over 20KHZ. Wave form at Hi and LO on the IC is very similar with no dead time and a slow rising and decay. Power supply is under load with a 10KV flyback and some neon tubing

Waveform.jpg

Where am I going wrong with the schematic?

With no load I have the same shape waveform with 150V on Gate HI and 5v Gate Lo
 
Last edited:

blasphemy000

New member
That 10mS waveform looks to be the positive half of the rectified 50Hz mains input(100Hz). There seems to be a few issues with that circuit, but I think a lot of your measurement issues are coming from improper probing locations. My only question is: Do you have a High-Voltage differential probe to properly analyze this circuit? If you don't have this type of probe, then you are going to have issues with probing the switching stages of an off-line SMPS. The only way you can properly probe this circuit without an HV Differential Probe, would be to connect this circuit to the mains with an isolation transformer, but then that can create other problems as well.

Also, this is not a flyback circuit. This is a half-bridge topology. Somebody else is going to have to chime in with ways that this circuit can be modified so that it works properly, I'm just seeing to many things wrong with this, and I'm not as knowledgeable with the IR2153 as some of the other members here are.
 

res_smps

Member
Also, this is not a flyback circuit. This is a half-bridge topology. Somebody else is going to have to chime in with ways that this circuit can be modified so that it works properly, I'm just seeing to many things wrong with this, and I'm not as knowledgeable with the IR2153 as some of the other members here are.

I also felt a bit strange with your schematic,
for example a resistors from VB to HO, a resistor from Vs, capacitor from D to S mosfet, no big one electrolytic cap from + to - (or 2 big cap divider?)
but it works on my simulation. can you explain your circuit?
maybe your problem because there is no big capacitor?2153.jpgcct.jpg
 

Gavin

New member
Well at this point I have to explain a few things. I have very little electronics knowledge apart from 3/4 of an advanced diploma some 10 years ago and the ability to repair pinball machines. I have however worked with high voltage for 30 years making and installing cold cathode lighting. The electronic power supplies for these are mainly made in China these days and most are of dubious quality. So, with more hope than ability, I set out to make my own. To do this, I have reverse engineered an existing supply(s) that are no longer made. The output on the diagram is how it is on the power supply ( ive been over and over this many times).Ive borrowed bits from here and there and put them together to come up with the diagram. It does work as it is happily driving some cold cathode tubing right now.. fets are super cool and without heatsinks. But how stable I have made it is another matter.
On my diagram I made a mistake.. the 200K resistor is meant to be in parallel to the bootstrap cap. Ive tried the circuit with and without this and it seems to make no difference. The HV caps on D &S Mosfets puzzled me but the diagram can also be drawn like this which unless im wrong (.. its possible) gives us a capacitive voltage divider.
cct revised.jpg

I don't however understand the 2 diodes on output.
My intention is to change the output to something more recognised ( resistor to cap across primary referenced to 2 large caps) as I know this works. Problem is that this circuit has become a bit of a fixation to me and im determined to see it operational with the waveforms I expect.. once ive done that, I can make my changes and move onto the next part of the project.
My CRO is not the best in the world and no I don't have a differential probe, but at some $1500 for a refurbished one, its not likely to happen.
The 2153 is a great little IC that at first seems so simple until you actually start to use it.. then its a fickle beast that requires a great deal of attention. It would appear to me though that it would be susceptible to voltage spikes and I guess like many, I wish it had feedback ability.
Thanks all for your input... I got this far on my own but do need some assistance to progress..
 

res_smps

Member
@res_smps: Where did you get the spice model for the IR2153? Any chance you have a model for a UC3843-UC3845?

on the internet but I do not remember, I attach for you here (edit asc file with your schematic and run it)
for UC3843 you can use LT1243 in folder [PowerProducts] in LTspice
 

Attachments

  • IR2153.zip
    2.6 KB · Views: 137

blasphemy000

New member
Thank you res_smps. I looked around online and wasn't able to come up with a working model of the IR2153. I did find a link to a Russian website that was supposed to have this model, but I couldn't get the website to translate properly and I can't read Russian.

I never noticed those in LTSpice. I guess I wasn't really looking either. I just got LTSpice the other day. I usually do my simulating with Multisim, but it doesn't seem to simulate certain things properly, so I'm trying some different software.
 

Gavin

New member
A little update on this if anyone is interested. I changed the output diodes to standard 1n4004 and although my scope struggles, I get a square wave at LO at junction IC and gate resistor of approx. 12V @ 50uSec... guess I can now go change the output.
 

Gavin

New member
Can someone tell me... is there any way to manipulate the outputs so one Fet remains on slightly longer than the other?
 

KX36

New member
I've only skimmed this thread, apologies if I'm repeating anyone.

The IR2153 is literally just a 555 timer with an integrated bootstrap high-side/low-site gate driver. You can model it with 2 pulse voltage sources, one on each FET gate, set in sync and with appropriate deadtime. Other than that, you can simulate it with a 555 model, D type flip flop wired as a toggle (wire Q-bar to D) and a voltage dependant voltage source as a level shifter (ground the input negative, connect output negative to the upper FET source). Those should at least get you to the point of "can your circuit work" before getting to the point of have you got it all right to drive your FETs. It won't tell you if your transformer is saturating, but you should be able to tell if it is likely to from the currents in it.

You generally don't want one FET to remain on longer than the other. Volt-seconds across the transformer must balance as close as possible to avoid saturating the transformer. Also, there's usually a capacitor in series with the transformer primary to help avoid it saturating which I noticed you don't have.

The first thing I'd probe is the full input voltage across the capacitors and the centre point of the 2 input capacitors. (using 100x 1kV scope probes) Those should both be steady DC, one is the full input voltage, one is half the input voltage. You should have the device on an isolation transformer to safely probe the mains side as you're connecting the chassis of your scope to mains making it dangerous to touch. Sometimes if you unexpectedly see a half sine wave on what should be a sine wave rectified to DC its because you've shorted out part of the rectifier with the probe or wired it wrong. Check this thoroughly, it's not always obvious when you short a bridge rectifier diode in a round-about way.

Perhaps you should start by comparing your schematic to those of other people who have the circuit working here, from things like the presence of that series capacitor to all the part values.
 
Last edited:
Top