View attachment 2x59 smps.GIF bridge 2x 25a 6x irfp 460 , 4x 470uf 400v 16x 470uf 100v 8x mur 1560 itd detex osc 130 khz
6kW+ design project
- Thread starter prof.hell
- Start date
View attachment osc.bmp osc 130khz ee trafo 16 n1 20 windings, n2 20 windings , n3 200 windings 0,18mm
Magnetics Section
I thought now to consider the magnetics part of the circuit, and the most obvious place to start is the transformer.
Here's some theory:
(next episode: choice of wire)
I thought now to consider the magnetics part of the circuit, and the most obvious place to start is the transformer.
Here's some theory:
- Magnetic Behaviour
When a magnetic core material is exposed to an external magnetic field of strength H, the molecules in that material will start to align with the direction of the external field. As the field is applied, magnetisation. During this magnetisation process, molecular energy barriers have to be overcome, denoted by B. Thus, the relationship between H and B is not linear. This process continues until a point known as Magnetic Saturation occurs. The reverse happens when the H is reduced, then reversed in direction. If the H - B relationship is plotted for all forces applied to the core, then a loop known as the Hysteresis Loop is observed. This is shown is Fig.1
Fig. 1: Hystereses Loop
As can be noted from Fig. 1 above, a magnetic core with zero magnetism will start from P1 in the figure where both B=H=0. As the core is subjected to an external magnetising field, magnetic field B starts to develop in the core, rising non-linearly in strength in relation to B, until point P2 where it will flatten and magnetic saturation occurs. At P2, the increase in H will not lead to an increase in B.
Now, if we were to decrease H gradually, the field in the core, B, will also decrease, until eventually reaching point P3. At this point, B ≠ 0. In other words, the core is still partially magnetised, even though H=0; this is referred to as Residual Magnetism, or remanence
As H is reversed in polarity, then so does the magnetic flux in the core B, until point P4 is reached. This point of zero crossing is called the point of coercivity.
Continuing this approach, point P5 is reached. The reverse and converse is trivial.
- Core Materials
A full discussion of magnetic cores is beyond the scope of this writeup. Below is a brief summary:
- Soft iron
Soft iron is used in electromagnets and some electric motors. Iron is a common material in magnetic core design as it can withstand very high levels of magnetisation, up to several Tesla.
Vis-à-Vis hard iron, soft iron does not remain magnetised when the field is removed which is important in transformer core design. That said, using a bulk soft iron core is also problematic due to susceptibility to Eddy Currents, causing core overheating.
To reduce the effects of Eddy Currents, two main approaches are employed which rely on increased electrical resistance, thus decreasing Eddy Currents: lamination and doping the iron with 3 - 5% of silicon. The latter of the two has the effect of massively increasing the electrical resistance up to four fold.
- Iron Powder
Powdered iron is used in compressed form, where individual particles are electrically insulated, thus increasing resistance and decreasing Eddy Currents.
- Samaloy has the added benefit of 3-D forming of particles in a particular way, further improving performance.
- METGLAS
METGLAS is an amorphous metal. Atoms are randomly arranged, leading to in increase in electrical resistance up 3 fold as compared to crystalline materials.
- Ferrites
Ferrites are a class of ceramic materials with useful electromagnetic properties. Formed of a mixture of iron oxide and different types of metal oxides. Addition of these kinds of metal oxides to ceramic in different amounts allows manufacturers to produce targeted types of ferrites for specific
applications.
High permeability of ferrites makes them ideal for very high frequency, low loss operation. Their greatly increased resistance leads to nglegeable levels of Eddy currents.
Material Saturation Peak Flux Density (T) Permeability (µ) Soft Iron ~2 5,000 Somaloy ~1.5 1,000 Ferrite (3C90) ~0.47 2,300 METGLAS (2605SA1) ~1.5 4,500
[*] Transformer Setup
In determining the number of turns for the the primary-side of the transformer, it is important to ensure that the core does not saturate, as the number of primary turns in the transformer also is determining the peak flux density in the core (ˆB[SUB]core[/SUB]). The relationship between number of primary turns, N1 ˆB[SUB]core[/SUB] is expressed as:
V[SUB]1[/SUB] = N[SUB]1[/SUB]A[SUB]c[/SUB]wˆB[SUB]core[/SUB] (Eq. 3.1)
Where A[SUB]c[/SUB] is the effective core area. Equation 3.1 is derived from Fraraday's Induction Law:
V[SUB]1[/SUB](t) = N[SUB]1[/SUB](dΦ/dt) (Eq. 3.2)
Where V[SUB]1[/SUB](t) is the time-varying voltage on the primary side and (dΦ/dt) is the first derivative of the flux density in the core over time.
The magnetic flux in the core is expressed as:
Φ = A[SUB]c[/SUB]ˆB[SUB]core[/SUB] (Eq. 3.3)
Substituting Φ, equation 3.2 above can be rewritten as:
(Eq. 3.4)
It is know that primary voltage V[SUB]1[/SUB] over time 0 to DT[SUB]s[/SUB] is equal to the input voltage of the converter V[SUB]d[/SUB]. The maximum voltage applied on the primary side will create the peak flux density ˆB[SUB]core[/SUB]. Thus, equation 3.4 solves to:
(Eq. 3.5)
- Soft iron
(next episode: choice of wire)
Choice of wire and transformer winding
Choice of Wire
In this instalment, we will deal with the choice of wire used for winding the transformer.
For the purposes of discussion, we will refer to the conceptual modeling of the converter section in Figure 2 below. Switches T1 - T4 represent the four transistors used in the bridge:
To arrive at the wire spec, RMS currents come into the scene. I will skip the derivation of these equations in the interest of simple maths. The end result equations are:
(Eq. 3.5)
(Eq. 3.6)
Where: n[sub]2[/sub] and n[sub]1[/sub] are the number of secondary and primary windings respectively and D[/D] is the Duty Cycle.
For completeness, the final transformer setup is then expressed as:
(Eq. 3.7)
For our purposes, Litz-wire. It is designed to reduce the skin and proximity effects losses associated with conductors, hence making a good choice for SMPS transformer design. To achieve the desired effects, Litz-wire consists of many thin wires, individually coated with an insulator.
Due to the choice of wire, skin effects usually present at our chosen frequency of operation (100kHz) can be ignored.
(off to work, more later)
Choice of Wire
In this instalment, we will deal with the choice of wire used for winding the transformer.
For the purposes of discussion, we will refer to the conceptual modeling of the converter section in Figure 2 below. Switches T1 - T4 represent the four transistors used in the bridge:
To arrive at the wire spec, RMS currents come into the scene. I will skip the derivation of these equations in the interest of simple maths. The end result equations are:
(Eq. 3.5) (Eq. 3.6)Where: n[sub]2[/sub] and n[sub]1[/sub] are the number of secondary and primary windings respectively and D[/D] is the Duty Cycle.
For completeness, the final transformer setup is then expressed as:
(Eq. 3.7)For our purposes, Litz-wire. It is designed to reduce the skin and proximity effects losses associated with conductors, hence making a good choice for SMPS transformer design. To achieve the desired effects, Litz-wire consists of many thin wires, individually coated with an insulator.
Due to the choice of wire, skin effects usually present at our chosen frequency of operation (100kHz) can be ignored.
(off to work, more later)
Choice of wire - continued
For our purposes, Litz-wire. It is designed to reduce the skin and proximity effects losses associated with conductors, hence making a good choice for SMPS transformer design. To achieve the desired effects, Litz-wire consists of many thin wires, individually coated with an insulator.
Due to the choice of wire, skin effects usually present at our chosen frequency of operation (100kHz) can be ignored.
Due to the high current requirement, a Litz wire with a cross-sectional area A[SUB]c[/SUB], 0.94mm2 has been selected. With this type of wire a current density J of 3A/mm[SUP]2[/SUP]. As such, a bundle of wires have to be used to cope with the high current requirements.
The current passing in the the primary bundle is expressed as follows:
X[sub]prim,INT[/sub]bundle = I[sub]1,RMS[/sub] / J.A[sub]c,Litz[/sub] (Eq. 3.8)
Thus, the combined cross section of the primary side bundle resolves to:
A[sub]c1,bundle[/sub] = X[sub]prim,INT[/sub]A[sub]c,litz[/sub] (Eq. 3.9)
Similarly, calculations for the secondary side are thus:
X[sub]sec,INT[/sub]bundle = I[sub]2,RMS[/sub] / J.A[sub]c,Litz[/sub] (Eq. 3.10)
The combined cross section of the secondary side bundle resolves to:
A[sub]c2,bundle[/sub] = X[sub]prim,INT[/sub]A[sub]c,litz[/sub] (Eq. 3.11)
Next, we need to determine if the bundle will fit in our chosen core by calculating the window area. Assume a copper filling factor (k[sub]cu[/sub]), k[sub]cu1[/sub] = k[sub]cu2[/sub] = 0.5 and a turn ration n = 20. The winding area, ∆A[sub]w[/sub] occupied by 20 primary winding and 1 secondary windings is:
∆A[sub]w[/sub] = (A[SUB]c2,bundle[/SUB] + 20A[SUB]c1,bundle[/SUB]) / k[sub]cu,1[/sub] (Eq. 3.12)
Losses
Without delving into derivations, we will consider the following losses:
Transistor losses, expressed at a given V[sub]ref[/sub] and I[sub]ref[/sub] respectively are expressed as:
Turn-on transistor loss (P[sub]on[/sub]) = E[sub]on[/sub] (V[sub]d[/sub]I[sub]o[/sub] / V[sub]ref[/sub]I[sub]ref[/sub])f[sub]s[/sub] (Eq. 3.13)
Turn-off transistor loss (P[sub]off[/sub]) = E[sub]off[/sub] (V[sub]d[/sub]I[sub]o[/sub] / V[sub]ref[/sub]I[sub]ref[/sub])f[sub]s[/sub] (Eq. 3.14)
Where f[sub]s[/sub] is the switching frequency.
Total transistor losses are expressed as: P[sub]t[/sub] = P[sub]c[/sub] + P[sub]sw[/sub] (Eq. 3.15)
Magnetic Losses L[sub]m[/sub] = A[sub]L[/sub]N[sub]1[/sub][sup]2[/sup] (Eq. 3.16)
Where A[sub]L is the inductance factor for a given core.
Magnetisation current loss ∆I[sub]m[/sub] = (V[sub]d[/sub]DT[sub]s[/sub]) / L[sub]m[/sub] (Eq. 3.17)
Core Losses
Manufacturers usually give equations to calculate core losses (P[sub]core[/core)) for a given core. Whee such data is not available, core loss calculations can be approximated by measuring power loss data of a particular core at a given temperature, then fitting a cure to the measured data by standard numerical techniques.
Most manufactures do, however, provide equations to calculate core losses at standard frequencies. Delving into the mathematical derivation is outside the scope of this paper.
Resistive Losses
We need to determine the total length of wire used in the primary and secondary windings (L[sub]1[/sub] and L[sub]2[/sub] respectively):
L[sub]1[/sub] = coreleg[sub]perim[/sub] x N[sub]1[/sub] turns (Eq. 3.18)
L[sub]2[/sub] = coreleg[sub]perim[/sub] x N[sub]2[/sub] turns (Eq. 3.19)
coreleg[sub]perim[/sub] represents the perimeter of each core leg and is given in data sheets.
Thus, R[sub]1[/sub] and R[sub]2[/sub] are expressed as:
R[sub]1[/sub] = ρ[sub]cu[/sub]L[sub]1[/sub] / A[sub]c1[/sub],bundle (Eq. 3.20)
R[sub]2[/sub] = ρ[sub]cu[/sub]L[sub]2[/sub] / A[sub]c2[/sub],bundle (Eq. 3.21)
Where ρ[sub]cu[/sub] is the resistivity of copper, measured at 1.68E10[sup]-8[/sup]
Substituting equations 3.20 and 3.21 into Ohm's law, the total resistive losses are:
P[sub]cu[/sub] = R[sub]1[/sub]I[sup]2[/sup][sub]1,RMS[/sub] + R[sub]2[/sub]I[sup]2[/sup][sub]2,RMS[/sub] (Eq. 3.22)
In conclusion, the total maximum power loss for a particular transformer design is thus:
P[sub]tot[/sub] = P[sub]core[/sub] + P[sub]cu[/sub] (Eq. 3.23)
For our purposes, Litz-wire. It is designed to reduce the skin and proximity effects losses associated with conductors, hence making a good choice for SMPS transformer design. To achieve the desired effects, Litz-wire consists of many thin wires, individually coated with an insulator.
Due to the choice of wire, skin effects usually present at our chosen frequency of operation (100kHz) can be ignored.
Due to the high current requirement, a Litz wire with a cross-sectional area A[SUB]c[/SUB], 0.94mm2 has been selected. With this type of wire a current density J of 3A/mm[SUP]2[/SUP]. As such, a bundle of wires have to be used to cope with the high current requirements.
The current passing in the the primary bundle is expressed as follows:
X[sub]prim,INT[/sub]bundle = I[sub]1,RMS[/sub] / J.A[sub]c,Litz[/sub] (Eq. 3.8)
Thus, the combined cross section of the primary side bundle resolves to:
A[sub]c1,bundle[/sub] = X[sub]prim,INT[/sub]A[sub]c,litz[/sub] (Eq. 3.9)
Similarly, calculations for the secondary side are thus:
X[sub]sec,INT[/sub]bundle = I[sub]2,RMS[/sub] / J.A[sub]c,Litz[/sub] (Eq. 3.10)
The combined cross section of the secondary side bundle resolves to:
A[sub]c2,bundle[/sub] = X[sub]prim,INT[/sub]A[sub]c,litz[/sub] (Eq. 3.11)
Next, we need to determine if the bundle will fit in our chosen core by calculating the window area. Assume a copper filling factor (k[sub]cu[/sub]), k[sub]cu1[/sub] = k[sub]cu2[/sub] = 0.5 and a turn ration n = 20. The winding area, ∆A[sub]w[/sub] occupied by 20 primary winding and 1 secondary windings is:
∆A[sub]w[/sub] = (A[SUB]c2,bundle[/SUB] + 20A[SUB]c1,bundle[/SUB]) / k[sub]cu,1[/sub] (Eq. 3.12)
Losses
Without delving into derivations, we will consider the following losses:
- Transistor Conduction Losses (P[sub]c[/sub])
- Transistor Switching Losses (P[sub]sw[/sub] = P[sub]on[/sub] + P[sub]off[/sub])
- Magnetic Losses (L[sub]m[/m] and ∆I[sub]m[/sub])
- Resistive Losses for Primary and Secondary windings (R[sub]1[/sub] and R[sub]2[/sub])
- Core Losses (P[sub]core[/sub])
- Resistive Losses
Transistor losses, expressed at a given V[sub]ref[/sub] and I[sub]ref[/sub] respectively are expressed as:
Turn-on transistor loss (P[sub]on[/sub]) = E[sub]on[/sub] (V[sub]d[/sub]I[sub]o[/sub] / V[sub]ref[/sub]I[sub]ref[/sub])f[sub]s[/sub] (Eq. 3.13)
Turn-off transistor loss (P[sub]off[/sub]) = E[sub]off[/sub] (V[sub]d[/sub]I[sub]o[/sub] / V[sub]ref[/sub]I[sub]ref[/sub])f[sub]s[/sub] (Eq. 3.14)
Where f[sub]s[/sub] is the switching frequency.
Total transistor losses are expressed as: P[sub]t[/sub] = P[sub]c[/sub] + P[sub]sw[/sub] (Eq. 3.15)
Magnetic Losses L[sub]m[/sub] = A[sub]L[/sub]N[sub]1[/sub][sup]2[/sup] (Eq. 3.16)
Where A[sub]L is the inductance factor for a given core.
Magnetisation current loss ∆I[sub]m[/sub] = (V[sub]d[/sub]DT[sub]s[/sub]) / L[sub]m[/sub] (Eq. 3.17)
Core Losses
Manufacturers usually give equations to calculate core losses (P[sub]core[/core)) for a given core. Whee such data is not available, core loss calculations can be approximated by measuring power loss data of a particular core at a given temperature, then fitting a cure to the measured data by standard numerical techniques.
Most manufactures do, however, provide equations to calculate core losses at standard frequencies. Delving into the mathematical derivation is outside the scope of this paper.
Resistive Losses
We need to determine the total length of wire used in the primary and secondary windings (L[sub]1[/sub] and L[sub]2[/sub] respectively):
L[sub]1[/sub] = coreleg[sub]perim[/sub] x N[sub]1[/sub] turns (Eq. 3.18)
L[sub]2[/sub] = coreleg[sub]perim[/sub] x N[sub]2[/sub] turns (Eq. 3.19)
coreleg[sub]perim[/sub] represents the perimeter of each core leg and is given in data sheets.
Thus, R[sub]1[/sub] and R[sub]2[/sub] are expressed as:
R[sub]1[/sub] = ρ[sub]cu[/sub]L[sub]1[/sub] / A[sub]c1[/sub],bundle (Eq. 3.20)
R[sub]2[/sub] = ρ[sub]cu[/sub]L[sub]2[/sub] / A[sub]c2[/sub],bundle (Eq. 3.21)
Where ρ[sub]cu[/sub] is the resistivity of copper, measured at 1.68E10[sup]-8[/sup]
Substituting equations 3.20 and 3.21 into Ohm's law, the total resistive losses are:
P[sub]cu[/sub] = R[sub]1[/sub]I[sup]2[/sup][sub]1,RMS[/sub] + R[sub]2[/sub]I[sup]2[/sup][sub]2,RMS[/sub] (Eq. 3.22)
In conclusion, the total maximum power loss for a particular transformer design is thus:
P[sub]tot[/sub] = P[sub]core[/sub] + P[sub]cu[/sub] (Eq. 3.23)
LC Filter, ZVS and Synchronous Rectifiers
4. LC Filter Analysis
Continuing our magnetics section, we shall now consider the design of the low-voltage side low-pass LC filter.
To keep the posting short, I don't propose to derive the necessary equations. This was done in the transformer section for the education value and the importance of the transformer as a core piece of the design.
Ripple requirement is assumed to be 1% of the load current.
The minimum inductor value L[sub]min[/sub] is expressed as:
(Eq. 4.1)
The maximum value of the capacitor C[sub]max[/sub] is expressed as:
(Eq. 4.2)
5. ZVS Strategy
Briefly, snubbers are passive components placed across semiconductors to achieve advantages such as reduced voltage spikes, off-loading power dissipation from the active semiconductor component, reduction of EMI and other advantages that are beyond our scope.
Bridge converters limit the choice of snubbers that can be used due to short circuit currents present in the system. One common snubber strategy is to use what is known as a lossless snubber in the shape of a capacitor placed in parallel with each switch in the bridge. This capacitor will also have the effect of shifting the voltage waveform seen in the switching arrangement. Thus, a Zero Voltage Switching or ZVS will be achieved.
6. Synchronous Rectifier Section
Our converter is to use a synchronous rectifier setup built with MOSFET transistors, which is a common in high-current converters. One challenge with this technique is maintaining good control of the MOSFET dead time to avoid short circuits.
4. LC Filter Analysis
Continuing our magnetics section, we shall now consider the design of the low-voltage side low-pass LC filter.
To keep the posting short, I don't propose to derive the necessary equations. This was done in the transformer section for the education value and the importance of the transformer as a core piece of the design.
Ripple requirement is assumed to be 1% of the load current.
The minimum inductor value L[sub]min[/sub] is expressed as:
(Eq. 4.1)The maximum value of the capacitor C[sub]max[/sub] is expressed as:
(Eq. 4.2)5. ZVS Strategy
Briefly, snubbers are passive components placed across semiconductors to achieve advantages such as reduced voltage spikes, off-loading power dissipation from the active semiconductor component, reduction of EMI and other advantages that are beyond our scope.
Bridge converters limit the choice of snubbers that can be used due to short circuit currents present in the system. One common snubber strategy is to use what is known as a lossless snubber in the shape of a capacitor placed in parallel with each switch in the bridge. This capacitor will also have the effect of shifting the voltage waveform seen in the switching arrangement. Thus, a Zero Voltage Switching or ZVS will be achieved.
6. Synchronous Rectifier Section
Our converter is to use a synchronous rectifier setup built with MOSFET transistors, which is a common in high-current converters. One challenge with this technique is maintaining good control of the MOSFET dead time to avoid short circuits.
The interesting bit - Design Realisation
7. HV Side
First, a quick reminder of our design goals, noting a slight modification of the input voltage, V[sub]dc[/sub]:
Input Voltage (V[sub]dc[/sub]): 400Vdc (original design goal was 380Vdc)
Output Voltage (Vo): 12Vdc
Maximum output power (Po, max): 6,250W
Maximum output Current (I[sub]o[/sub]): 520A
Assumptions
Switching frequency (fs): 100kHz
Chosen Duty Cycle (D): 0.32
Chosen IGBT switch: International Rectifier AUIRGP35B60PD-E (here's the data sheet)
View attachment 4902
E[sub]on[/sub]: 270µJ
E[sub]off[/sub]: 256µJ
Selected Transformer Primary:Secondary Ratio
: 20:1
Switch Current: Total current I[sub]o[/sub] n = 520/20 = 26A
Given the voltage and current levels on the High Voltage side, IGBT transistors are used for the switching section.
To keep a good safety margin, transistors are rated at V[sub]CE[/sub] = 600V.
What remains now is to calculate the total switching current in the bridge. We will refer to this as P[sub]sw,tot[/sub:
View attachment 4903 (Eq. 7.1)
Total transistor conduction losses (P[sub]c) evaluate as follows (assuming V[sub]CEsat[/sub] at I[sub]c[/sub] = 35A and V[sub]GE[/sub] = 15V):
View attachment 4904 (Eq. 7.2)
The total losses on the primary side (P[sub]tot,HV(%)[/sub]), expressed as a percentage is then:
View attachment 4905 (Eq. 7.3)
7. HV Side
First, a quick reminder of our design goals, noting a slight modification of the input voltage, V[sub]dc[/sub]:
Input Voltage (V[sub]dc[/sub]): 400Vdc (original design goal was 380Vdc)
Output Voltage (Vo): 12Vdc
Maximum output power (Po, max): 6,250W
Maximum output Current (I[sub]o[/sub]): 520A
Assumptions
Switching frequency (fs): 100kHz
Chosen Duty Cycle (D): 0.32
Chosen IGBT switch: International Rectifier AUIRGP35B60PD-E (here's the data sheet)
View attachment 4902
E[sub]on[/sub]: 270µJ
E[sub]off[/sub]: 256µJ
Selected Transformer Primary:Secondary Ratio
: 20:1Switch Current: Total current I[sub]o[/sub] n = 520/20 = 26A
Given the voltage and current levels on the High Voltage side, IGBT transistors are used for the switching section.
To keep a good safety margin, transistors are rated at V[sub]CE[/sub] = 600V.
What remains now is to calculate the total switching current in the bridge. We will refer to this as P[sub]sw,tot[/sub:
View attachment 4903 (Eq. 7.1)
Total transistor conduction losses (P[sub]c) evaluate as follows (assuming V[sub]CEsat[/sub] at I[sub]c[/sub] = 35A and V[sub]GE[/sub] = 15V):
View attachment 4904 (Eq. 7.2)
The total losses on the primary side (P[sub]tot,HV(%)[/sub]), expressed as a percentage is then:
View attachment 4905 (Eq. 7.3)
Design Realisation - Continued
8. LV Side
In this section, we will derive the requirements for the low voltage side, starting secondary losses.
8.1 Secondary Losses
Two lots losses exist on the secondary side: synchronous rectifier section losses and magnetic losses in the transformer and LC section.
We start with the synchronous rectifier section.
8.1.1 Synchronous Rectifier Losses
We have said previously that a Synchronous Rectification scheme will be used. This is to reduce losses in the secondary side, maintain high efficiency and reduce heat generated. We will be using a bridge rectifier composed of 4 synchronous rectifiers.
In a bridge full-wave rectification setup, which we're using in this design, each rectifier will bear half the total output current I[SUB]o[/SUB].
Thus, MOSFET transistors need to be chosen to bear at least that much current, in addition to safety a margin of say 15 - 20%, taking account of turn-on, turn-off and conduction losses.
In our case, each synchronous rectifier MOSFET needs to be at least rated at an I[SUB]D[/SUB] of 300A.
For this work, the IRFB7434PBf from International Rectifier is chosen. Brief specs of this device:
I[sub]D[/sub]: 317A @ V[sub]DSS[/sub] = 40V and V[sub]GS[/sub] = 10V, measured at T[sub]c[/sub] = 25 ℃
R[sub]DS,on[/sub]: 1.25mΩ - 1.65mΩ
t[sub]r[/sub] = t[sub]f[/sub] = 68ns
Reverse Recovery Charge, Q[sub]rr[/sub] = 50 nC measured at reference current, voltage and temperature
To calculate the turn-on (P[SUB]on[/SUB]) and turn-off (P[SUB]off[/SUB]) losses, we will rely on the following formulae:
P[sub]on[/sub]
= (V[sub]d[/sub]I[sub]o[/sub]((t[sub]r[/sub] + t[sub]f[/sub])/2) + Q[sub]rr[/sub]V[sub]d[/sub] + ((Q[sub]rr[/sub]V[sub]d[/sub])/4))f[SUB]s[/SUB]
= ((12 . 300)((68 x 10[sup]-9[/sup] + 68 x 10[sup]-9[/sup]/2) + 50 x 10[sup]-9[/sup] + ((50 x 10[sup]-9[/sup]) . 12)/4)) . 100 x 10[sup]3[/sup]
= (0.0002448 + 50 x 10[sup]-9[/sup] + 15 x 10[sup]-10) x 100 x 10[sup]-10[/sup]
= 0.0002448515 x 100000
≈ 25W
P[sub]off[/sub] is simpler, expressed as:
= (V[sub]d[/sub]I[sub]o[/sub]((t[sub]r[/sub] + t[sub]f[/sub])/2) . f[sub]s[/sub]
= (12 . 300)((68 x 10[sup]-9[/sup] + 68 x 10[sup]-9[/sup]/2) . 100 x 10[sup]3[/sup]
= 0.0002448 x 100,000
≈ 25W
Conduction losses are derived as follows, ignoring Duty Cycle (D), since we are at the LV side:
We will assume R[sub]DS,on[/sub] to be assumed to be the maximum of 1.65mΩ and I[sub]DS[/sub] = I[sub]o[/sub] = 520A
Conduction losses, P[sub]c[/sub] can be approximated as:
P[sub]c[/sub] = R[sub]DS,on[/sub] . (I[sub]o[/sub]/2)[sup]2[/sup]
= 1.68 x 10[sup]-3[/sup] . 520
≈ 1W
∴ Total Synchronous Rectifier Losses = (P[sub]on[/sub] + P[sub]off[/sub] + P[sub]c[/sub]) x 4
= (25W + 25W + 1) x 4
= 104W
8.1.2 Magnetic Losses
As stated earlier, magnetic losses are composed of losses in the transformer core, added to losses in the inductor core of the LC section inductor.
8.1.2.1 Transformer Configuration
Primary side RMS current (I[sub]1,RMS[/sub]) is:
Assuming a 20:1 secondary to primary ratio:
I[sub]1,RMS[/sub] = (n[sub]2[/sub]/n[sub]1[/sub]) . I[sub]o,max . sqrt (D)
= 1/20 . 520 . sqrt (0.32)
= 14.7A
I[sub]1,RMS[/sub] ≈ 15A
Secondary side RMS current (I[sub]2,RMS[/sub]) is:
I[sub]2,RMS[/sub] = 0.5 . I[sub]o,max[/sub] . sqrt (1 + D)
= 0.5 . 520 . 1.5
I[sub]2,RMS[/sub] = 390A
Now to the Litz bundle. Recall we are aiming at a current density of J = 3A/mm[sup]2[/sup] and Litz wire with a cross section area A[sub]c,Litz[/sub] = 0.94mm[sup]2[/sup]
Primary Bundle:
X[sub]prim,INT bundled wires[/sub] = I[sub]1,RMS[/sub] / (J . A[sub]c,Litz[/sub])
= 15 / (3 . 0.94)
= 5.319
∴ X[sub]prim,INT bundled wires[/sub] ≈ 6
∴ New cross section area of primary bundle = 6 x 0.94
A[sub]c1,bundle[/sub]= 5.64mm[sup]2[/sup]
Secondary Bundle:
Similarly, for the secondary bundle, X[sub]sec,INT bundled wires[/sub]:
X[sub]sec,INT bundled wires[/sub] = 390 / (3 . 0.94)
= 138.297
∴ X[sub]sec,INT bundled wires[/sub] ≈ 139
∴ New cross section area of secondary bundle = 139 x 0.94
A[sub]c2,bundle[/sub]= 130.66mm[sup]2[/sup]
Now to calculate the window area, ∆A[sub]w[/sub], needed to satisfy the above bundle dimensions, recalling our n=20 secondary-to-primary ratio and a cooper filling factor k[sub]cu,1[/sub] = k[sub]cu,2[/sub] = 0.5:
∆A[sub]w[/sub] = (A[sub]c2,bundle[/sub] + nA[sub]c1,bundle[/sub]) / k[sub]cu,1
Thus, the area can be expressed as a function of the number of primary turns, N[sub]1[/sub] as follows:
A[sub]w[/sub] = N[sub]2[/sub]∆A[sub]w[/sub]
= (N1 x ∆A[sub]w[/sub]) / n
Research has indicated that core material 3C91 from Ferroxcube is feasible, having the following characteristics:
Material: 3C91
Saturation flux density (T): 0.47
Density (g/cm[sup]3[/sup]): 4.8
Curie Temp (℃): 220
(To be continued)
8. LV Side
In this section, we will derive the requirements for the low voltage side, starting secondary losses.
8.1 Secondary Losses
Two lots losses exist on the secondary side: synchronous rectifier section losses and magnetic losses in the transformer and LC section.
We start with the synchronous rectifier section.
8.1.1 Synchronous Rectifier Losses
We have said previously that a Synchronous Rectification scheme will be used. This is to reduce losses in the secondary side, maintain high efficiency and reduce heat generated. We will be using a bridge rectifier composed of 4 synchronous rectifiers.
In a bridge full-wave rectification setup, which we're using in this design, each rectifier will bear half the total output current I[SUB]o[/SUB].
Thus, MOSFET transistors need to be chosen to bear at least that much current, in addition to safety a margin of say 15 - 20%, taking account of turn-on, turn-off and conduction losses.
In our case, each synchronous rectifier MOSFET needs to be at least rated at an I[SUB]D[/SUB] of 300A.
For this work, the IRFB7434PBf from International Rectifier is chosen. Brief specs of this device:
I[sub]D[/sub]: 317A @ V[sub]DSS[/sub] = 40V and V[sub]GS[/sub] = 10V, measured at T[sub]c[/sub] = 25 ℃
R[sub]DS,on[/sub]: 1.25mΩ - 1.65mΩ
t[sub]r[/sub] = t[sub]f[/sub] = 68ns
Reverse Recovery Charge, Q[sub]rr[/sub] = 50 nC measured at reference current, voltage and temperature
To calculate the turn-on (P[SUB]on[/SUB]) and turn-off (P[SUB]off[/SUB]) losses, we will rely on the following formulae:
P[sub]on[/sub]
= (V[sub]d[/sub]I[sub]o[/sub]((t[sub]r[/sub] + t[sub]f[/sub])/2) + Q[sub]rr[/sub]V[sub]d[/sub] + ((Q[sub]rr[/sub]V[sub]d[/sub])/4))f[SUB]s[/SUB]
= ((12 . 300)((68 x 10[sup]-9[/sup] + 68 x 10[sup]-9[/sup]/2) + 50 x 10[sup]-9[/sup] + ((50 x 10[sup]-9[/sup]) . 12)/4)) . 100 x 10[sup]3[/sup]
= (0.0002448 + 50 x 10[sup]-9[/sup] + 15 x 10[sup]-10) x 100 x 10[sup]-10[/sup]
= 0.0002448515 x 100000
≈ 25W
P[sub]off[/sub] is simpler, expressed as:
= (V[sub]d[/sub]I[sub]o[/sub]((t[sub]r[/sub] + t[sub]f[/sub])/2) . f[sub]s[/sub]
= (12 . 300)((68 x 10[sup]-9[/sup] + 68 x 10[sup]-9[/sup]/2) . 100 x 10[sup]3[/sup]
= 0.0002448 x 100,000
≈ 25W
Conduction losses are derived as follows, ignoring Duty Cycle (D), since we are at the LV side:
We will assume R[sub]DS,on[/sub] to be assumed to be the maximum of 1.65mΩ and I[sub]DS[/sub] = I[sub]o[/sub] = 520A
Conduction losses, P[sub]c[/sub] can be approximated as:
P[sub]c[/sub] = R[sub]DS,on[/sub] . (I[sub]o[/sub]/2)[sup]2[/sup]
= 1.68 x 10[sup]-3[/sup] . 520
≈ 1W
∴ Total Synchronous Rectifier Losses = (P[sub]on[/sub] + P[sub]off[/sub] + P[sub]c[/sub]) x 4
= (25W + 25W + 1) x 4
= 104W
8.1.2 Magnetic Losses
As stated earlier, magnetic losses are composed of losses in the transformer core, added to losses in the inductor core of the LC section inductor.
8.1.2.1 Transformer Configuration
Primary side RMS current (I[sub]1,RMS[/sub]) is:
Assuming a 20:1 secondary to primary ratio:
I[sub]1,RMS[/sub] = (n[sub]2[/sub]/n[sub]1[/sub]) . I[sub]o,max . sqrt (D)
= 1/20 . 520 . sqrt (0.32)
= 14.7A
I[sub]1,RMS[/sub] ≈ 15A
Secondary side RMS current (I[sub]2,RMS[/sub]) is:
I[sub]2,RMS[/sub] = 0.5 . I[sub]o,max[/sub] . sqrt (1 + D)
= 0.5 . 520 . 1.5
I[sub]2,RMS[/sub] = 390A
Now to the Litz bundle. Recall we are aiming at a current density of J = 3A/mm[sup]2[/sup] and Litz wire with a cross section area A[sub]c,Litz[/sub] = 0.94mm[sup]2[/sup]
Primary Bundle:
X[sub]prim,INT bundled wires[/sub] = I[sub]1,RMS[/sub] / (J . A[sub]c,Litz[/sub])
= 15 / (3 . 0.94)
= 5.319
∴ X[sub]prim,INT bundled wires[/sub] ≈ 6
∴ New cross section area of primary bundle = 6 x 0.94
A[sub]c1,bundle[/sub]= 5.64mm[sup]2[/sup]
Secondary Bundle:
Similarly, for the secondary bundle, X[sub]sec,INT bundled wires[/sub]:
X[sub]sec,INT bundled wires[/sub] = 390 / (3 . 0.94)
= 138.297
∴ X[sub]sec,INT bundled wires[/sub] ≈ 139
∴ New cross section area of secondary bundle = 139 x 0.94
A[sub]c2,bundle[/sub]= 130.66mm[sup]2[/sup]
Now to calculate the window area, ∆A[sub]w[/sub], needed to satisfy the above bundle dimensions, recalling our n=20 secondary-to-primary ratio and a cooper filling factor k[sub]cu,1[/sub] = k[sub]cu,2[/sub] = 0.5:
∆A[sub]w[/sub] = (A[sub]c2,bundle[/sub] + nA[sub]c1,bundle[/sub]) / k[sub]cu,1
Thus, the area can be expressed as a function of the number of primary turns, N[sub]1[/sub] as follows:
A[sub]w[/sub] = N[sub]2[/sub]∆A[sub]w[/sub]
= (N1 x ∆A[sub]w[/sub]) / n
Research has indicated that core material 3C91 from Ferroxcube is feasible, having the following characteristics:
Material: 3C91
Saturation flux density (T): 0.47
Density (g/cm[sup]3[/sup]): 4.8
Curie Temp (℃): 220
(To be continued)
Looks like you're doing well. You obviously know what you're doing, understand the circuits and IMHO have made good design choices so far. I don't really have time or money to take on another project, but I am interested to see how this turns out. Bset of luck.
Here's a 4.8kW interleaved CCM PFC evaluation board for reference
http://www.ti.com/tool/pmp4311
Here's a 4.8kW interleaved CCM PFC evaluation board for reference
http://www.ti.com/tool/pmp4311