I am trying to teach myself how to calculate control loops. From the documents i have found it looks to be very difficult. They talk about poles and zeros which i do not understand. I am trying to find beginner documents that are easier to understand. Does anyone have a URL for this information.
Help with poles and zeros and control loops
- Thread starter wally7856
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It is very daunting for a beginner. The maths is literally complex (i.e. involving imaginary numbers, usually denoted i in maths, but j in electronics to avoid confusion with current). You need to have a basic understanding of transfer functions. You should be aware of what a Laplace transform is but you don't need to work one through. The same goes for Fourrier series (you may have heard of FFT) and Nyquist plots. You need to know about Bode plots and be able to draw them. You need to know the Nyquist stability criteria for feedback loops as well as logs for dB etc.
Briefly (hopefully), the Nyquist stability criteria for a feedback loop is that every frequency with gain over 1 (0dB) must be negative feedback for a system to be stable and not oscillate, i.e. have a phase margin (to 180 deg) of >0 deg, or put the other way, every frequency with negative phase margin (i.e. positive feedback) must have a gain of >0dB for any ringing to die out rather than turn into oscillation The 0dB crossover frequency is the most important frequency to look at.
This phase margin also determines the step response since the time and frequency domains are tied together (Laplace transform). Too little PM causes overshoot and ringing and the system is overdamped, too much phase margin and the system will take longer than necessary to settle in a step response and the system is underdamped. The ideal PM for critical damping is around 72 deg IIRC. In practice, you need at least 45 deg PM at crossover, 60 deg is a typical target value.
You can assess stability on a Bode plot. A pole (e.g. as used in a RC low pass filter), will add a gradient of -20dB/decade and -90deg phase to frequencies above it. A zero (e.g. as used in a RC high pass filter), will add a gradient of +20dB/decade and +90deg phase to frequencies above it.
There is also a right hand plane (of the Nyquist plot) zero which sometimes needs to be accounted for (e.g. in all boost and buck-boost derived converters, where in the time domain both the on and off time of the duty cycle are important and since more on time means less off time, a deficiency of off time can cause instability). In the frequency domain, a RHP zero has the gain effect of a zero but the phase effect of a pole. More gain and less phase margin is a bad combination and usually the only hope to stabilise a system with a RHP zero is to make sure it only happens where gain is <0dB.
There is also a special case for LC filters as both components are primarily reactive rather than resistive they form a complex conjugate double pole (or zero) which can have a resonant spike in the gain plot and can change phase 180 degrees in a very short span of frequency, depending only on how well it's damped. There is an LC filter in a Voltage mode controlled SMPS which can be difficult to bring under control. The main advantages of current mode control come from it splitting this complex conjugate double pole into 2 real poles separated by some distance and much easier to control (the high pole is usually well above the 0dB crossover frequency.)
Other typical targets for the design of your feedback loop are high DC gain for good DC regulation and a high crossover frequency for a fast step response. The theoretical limit for crossover frequency is half the switching frequency Fs (Nyquist's coming up again, this time in terms of sampling theory), and typically it'd be around 10-20% of Fs. Optocouplers and RHP zeros can push this much lower though.
Another thing that helps when drawing Bode plots is that the changes associated with a simple real pole or a zero are generally gradual from about a decade before to a decade after the pole/zero.
You can (and should) use SPICE to similate feedback loops and generate Bode plots, the hardest thing about it then is knowing whether your frequency domain model matches the time domain model, since non-linear components such as PWM duty cycle dissolve into the transfer function equations. If you have access to it, you can also use MATLAB to draw a Bode plot from a transfer function but it can be complex and only really worthwhile if a generic transfer function is all you have to work with.
Hope that helps,
Matt
Briefly (hopefully), the Nyquist stability criteria for a feedback loop is that every frequency with gain over 1 (0dB) must be negative feedback for a system to be stable and not oscillate, i.e. have a phase margin (to 180 deg) of >0 deg, or put the other way, every frequency with negative phase margin (i.e. positive feedback) must have a gain of >0dB for any ringing to die out rather than turn into oscillation The 0dB crossover frequency is the most important frequency to look at.
This phase margin also determines the step response since the time and frequency domains are tied together (Laplace transform). Too little PM causes overshoot and ringing and the system is overdamped, too much phase margin and the system will take longer than necessary to settle in a step response and the system is underdamped. The ideal PM for critical damping is around 72 deg IIRC. In practice, you need at least 45 deg PM at crossover, 60 deg is a typical target value.
You can assess stability on a Bode plot. A pole (e.g. as used in a RC low pass filter), will add a gradient of -20dB/decade and -90deg phase to frequencies above it. A zero (e.g. as used in a RC high pass filter), will add a gradient of +20dB/decade and +90deg phase to frequencies above it.
There is also a right hand plane (of the Nyquist plot) zero which sometimes needs to be accounted for (e.g. in all boost and buck-boost derived converters, where in the time domain both the on and off time of the duty cycle are important and since more on time means less off time, a deficiency of off time can cause instability). In the frequency domain, a RHP zero has the gain effect of a zero but the phase effect of a pole. More gain and less phase margin is a bad combination and usually the only hope to stabilise a system with a RHP zero is to make sure it only happens where gain is <0dB.
There is also a special case for LC filters as both components are primarily reactive rather than resistive they form a complex conjugate double pole (or zero) which can have a resonant spike in the gain plot and can change phase 180 degrees in a very short span of frequency, depending only on how well it's damped. There is an LC filter in a Voltage mode controlled SMPS which can be difficult to bring under control. The main advantages of current mode control come from it splitting this complex conjugate double pole into 2 real poles separated by some distance and much easier to control (the high pole is usually well above the 0dB crossover frequency.)
Other typical targets for the design of your feedback loop are high DC gain for good DC regulation and a high crossover frequency for a fast step response. The theoretical limit for crossover frequency is half the switching frequency Fs (Nyquist's coming up again, this time in terms of sampling theory), and typically it'd be around 10-20% of Fs. Optocouplers and RHP zeros can push this much lower though.
Another thing that helps when drawing Bode plots is that the changes associated with a simple real pole or a zero are generally gradual from about a decade before to a decade after the pole/zero.
You can (and should) use SPICE to similate feedback loops and generate Bode plots, the hardest thing about it then is knowing whether your frequency domain model matches the time domain model, since non-linear components such as PWM duty cycle dissolve into the transfer function equations. If you have access to it, you can also use MATLAB to draw a Bode plot from a transfer function but it can be complex and only really worthwhile if a generic transfer function is all you have to work with.
Hope that helps,
Matt
Thanks Matt.
I have spent many hours searching the internet for answers and found that any article associated with poles and zeros, bode plots or control loop theory quickly turn in to mind numbing math and hard to grasp concepts.
I do recognize many of the things you have written was in those articles. But they were not written in a easier to understand overall view like you did.
With that said, this could take years to understand. I do not see any easy way out.
I also wonder about all the SMPS circuits that are on the web. I find it hard to believe that all the people posting them really understand the control loop or how to calculate the component values. I would think many of them are just taking a wild guess on what values to use or just copying values from someone else's design that they think works.
But thanks again for your reply, i will use it for a reference on what to search for and learn for designing control loops.
I have spent many hours searching the internet for answers and found that any article associated with poles and zeros, bode plots or control loop theory quickly turn in to mind numbing math and hard to grasp concepts.
I do recognize many of the things you have written was in those articles. But they were not written in a easier to understand overall view like you did.
With that said, this could take years to understand. I do not see any easy way out.
I also wonder about all the SMPS circuits that are on the web. I find it hard to believe that all the people posting them really understand the control loop or how to calculate the component values. I would think many of them are just taking a wild guess on what values to use or just copying values from someone else's design that they think works.
But thanks again for your reply, i will use it for a reference on what to search for and learn for designing control loops.
Most of the "SMPS" here are completely unregulated, they're essentially old fashioned linear mains supplies but running off a high frequency oscillator instead of the 50/60Hz of the mains. AFAIK nobody around here knows any control theory etc. If that will do for you it'll save you a lot of effort.
It's not really hard to use when everything goes right, you just have to get used to it. It's only when things go wrong you really use the theory. Search my other posts on this forum (I assume the forum can do that), I've given a couple of other people who dare to strive for actual regulation some more guidance which might be useful to you.
Even comercially there are lots of poor designs, people using a TL431 as if it's a zener diode rather than as an error amplifier etc.
Here's quite a good website about SPICE simulations of average current mode control converters, there's also a couple of pages about votlage mode control and a decent bit of info about SMPS in general. There are some mistakes, but the guy knows what he's doing 95% of the time.
http://www.genomerics.talktalk.net/
It's not really hard to use when everything goes right, you just have to get used to it. It's only when things go wrong you really use the theory. Search my other posts on this forum (I assume the forum can do that), I've given a couple of other people who dare to strive for actual regulation some more guidance which might be useful to you.
Even comercially there are lots of poor designs, people using a TL431 as if it's a zener diode rather than as an error amplifier etc.
Here's quite a good website about SPICE simulations of average current mode control converters, there's also a couple of pages about votlage mode control and a decent bit of info about SMPS in general. There are some mistakes, but the guy knows what he's doing 95% of the time.
http://www.genomerics.talktalk.net/
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KX36, thanks again. I had read your post below trying to help with control loops when you first posted it. It made no sense to me at all. I have since read it two more times after i have searched the internet and read a few other things. I am now able to pick out a few things and get the general idea of what you are trying to say. Fortunately your posts are filled with good keywords and a simple google search brings up many articles to read.
http://www.diysmps.com/forums/showthread.php?473-0-500V-SMPS-based-on-SG3525/page2
I have a question that is to hard to google for though. If you take a push pull design like you posted in the link above and the only thing you change is the controller, would that change the compensation network? Like from one voltage mode controller to another or going to a current mode control, and with all controllers having similar pin functions like an error amplifier.
http://www.diysmps.com/forums/showthread.php?473-0-500V-SMPS-based-on-SG3525/page2
I have a question that is to hard to google for though. If you take a push pull design like you posted in the link above and the only thing you change is the controller, would that change the compensation network? Like from one voltage mode controller to another or going to a current mode control, and with all controllers having similar pin functions like an error amplifier.
Current mode and voltage mode control are compensated differently because the plant gain is completely different. Compensation gets you from the plant gain you have to the loop gain you want, so anything that changes the plant gain will need you to have a look at the compensation. Current mode is significantly easier to compensate because you don't have that LC filter's complex conjugate double pole, input voltage has much less effect on stability and its a lot more forgiving with component values in terms of stability if not optimisation, especially useful if there's an optocoupler in the loop trying to trip you up with its unpredictable pole
Here's a reference for you:
http://www.ti.com/lit/an/snva555/snva555.pdf
Here's a reference for you:
http://www.ti.com/lit/an/snva555/snva555.pdf
Thanks for the TI ap note.
I have another broad question. This one is about the ON-Semi ap note for designing a control loop with the TL431 and opto feedback, you have posted a couple of times here. It shows how to design a type 3 feedback network around the TL431. Does this mean that in your push pull example here.
http://www.diysmps.com/forums/showth...n-SG3525/page2
You could eliminate your type 3 feedback on the UC2525 and add in the TL431 with opto isolation and type 3 feedback per the On-Semi ap note and the push pull would have a proper control loop.
I have another broad question. This one is about the ON-Semi ap note for designing a control loop with the TL431 and opto feedback, you have posted a couple of times here. It shows how to design a type 3 feedback network around the TL431. Does this mean that in your push pull example here.
http://www.diysmps.com/forums/showth...n-SG3525/page2
You could eliminate your type 3 feedback on the UC2525 and add in the TL431 with opto isolation and type 3 feedback per the On-Semi ap note and the push pull would have a proper control loop.
Theoretically... sort of.
The push-pull there is not a particularly good design, the builder insists on using voltage mode control even though it's not very suitable for push-pull because it allows the transformer to flux walk into saturation. Also there is no isolation between primary and secondary, the builder doesn't require it. (And ignore the RCD clamps in the primary. They're something I got from an app note schematic, but trying to clamp one winding to less than 2*Vin when that switch is off stops the other winding going to 0V when its switch is on, so it can't work as the app note claimed.)
A correctly designed type III compensated error amplifier should be suitable for that particular application regardless of whether it uses a TL431/opto circuit or a textbook opamp circuit, but the TL431 and opto add design constraints to the loop which might make such a design difficult or impossible depending on the rest of the loop.
The bandwidth of an optocoupler tends to be low and that means it adds a pole to the loop at an often inconvenent frequency, especially when it's near to the LC filter's resonant frequency as it can make it difficult to find any appropriate frequency for crossover that will be reliably stable. This pole frequency has a high variance between devices and within a device as it ages or its temperature changes. As I mentioned, voltage mode control is not so tolerant of poorly compensated loops as current mode control, so this can mean even if a loop is stabilised it might become unstable in the future. Lets not forget that in voltage mode control loops, loop gain and consequently crossover frequency is directly proportional to input voltage, so they must be designed to be stable over the entire expected input voltage range.
TL431 also has a mediocre bandwidth (measured GBWP around 1.5MHz IIRC, but I don't think it's specified in the datasheet so I can't say how reproducable that is) which will add a pole to the loop depending on how much gain you require of it. Type III compensation tends to require more GBWP than type II. In the example linked, IIRC the input voltage (transformed to the secondary) is very high, so most of the loop gain comes from the plant and not the compensator, so this last point might not be a problem there.
The push-pull there is not a particularly good design, the builder insists on using voltage mode control even though it's not very suitable for push-pull because it allows the transformer to flux walk into saturation. Also there is no isolation between primary and secondary, the builder doesn't require it. (And ignore the RCD clamps in the primary. They're something I got from an app note schematic, but trying to clamp one winding to less than 2*Vin when that switch is off stops the other winding going to 0V when its switch is on, so it can't work as the app note claimed.)
A correctly designed type III compensated error amplifier should be suitable for that particular application regardless of whether it uses a TL431/opto circuit or a textbook opamp circuit, but the TL431 and opto add design constraints to the loop which might make such a design difficult or impossible depending on the rest of the loop.
The bandwidth of an optocoupler tends to be low and that means it adds a pole to the loop at an often inconvenent frequency, especially when it's near to the LC filter's resonant frequency as it can make it difficult to find any appropriate frequency for crossover that will be reliably stable. This pole frequency has a high variance between devices and within a device as it ages or its temperature changes. As I mentioned, voltage mode control is not so tolerant of poorly compensated loops as current mode control, so this can mean even if a loop is stabilised it might become unstable in the future. Lets not forget that in voltage mode control loops, loop gain and consequently crossover frequency is directly proportional to input voltage, so they must be designed to be stable over the entire expected input voltage range.
TL431 also has a mediocre bandwidth (measured GBWP around 1.5MHz IIRC, but I don't think it's specified in the datasheet so I can't say how reproducable that is) which will add a pole to the loop depending on how much gain you require of it. Type III compensation tends to require more GBWP than type II. In the example linked, IIRC the input voltage (transformed to the secondary) is very high, so most of the loop gain comes from the plant and not the compensator, so this last point might not be a problem there.
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KX36, I know that voltage mode is not the best control scheme for a push pull topology. I am only using it for an example for voltage mode control loop design because you are already familiar with that thread. I am not trying to make a push pull, i am just trying to understand control loops. So i am using it for a convenient example.
It looks to me that there are 3 different ways to add compensation. using a TL431 on the isolated output side. Using the internal error amplifier of the control chip and using a stand alone op amp.
When you designed the compensation network for the 500V push pull was it for a stand alone op amp or for the error amplifier and would you have done anything differently if it was for one or the other.
It looks to me that there are 3 different ways to add compensation. using a TL431 on the isolated output side. Using the internal error amplifier of the control chip and using a stand alone op amp.
When you designed the compensation network for the 500V push pull was it for a stand alone op amp or for the error amplifier and would you have done anything differently if it was for one or the other.
You don't really have to do anything different between an internal error amplifier and a standalone opamp. In most cases all you have to do is make sure that when you model your design in SPICE etc you use the correct GBWP and open loop gain for whatever error amplifier it is, internal or discrete. Internal opamps do tend to be simpler devices with lower open loop gain.
(You probably already know the following, but I'll write it for completeness.)
Occasionally you get something like a TL494 (or its derivatives) which has an atypical connection of the internal E/A whereby the feedback signal might have to go to the non-inverting input and a divided down reference voltage goes to the inverting input. In this case, you have to think of it as if you're regulating the reference. e.g. type III compensation has a RC network between COMP and IN- pin and an RC across the upper resistor of the reference divider rather than the feedback divider. Those are general purpose PWM chips, you don't often have to worry about this in power supply ICs, but its worth looking through the block diagrams and following which steps invert the signal, which way round the comparator is etc just to make sure. Thinking through following the inversions of a perturbation in the output voltage through to its effect on the switching transistor's duty cycle will tell you whether the output of an optocoupler should be wired as common emitter or common collector, since one inverts and one does not, and this is something which does vary between ICs.
When not using the internal error amp, the way you inject the signal can vary between ICs, but often you will see a representation in the block diagram or even a transistor level schematic of the error amplifier that might tell you that the error amp's output is open emitter or open collector, in which cause you just have to hard wire the error amp's inputs so that this transistor is switched off and inject the signal to its output (generally the COMP pin). e.g. the TL494 datasheet shows diode outputs of the error amplifiers, indicating that the error amplifiers are OR'd as open emitters (see also this app note which has a schematic of the E/A and gives lots of detail about how to use the TL494 with proper OCP, OVP etc ). Since they're open emitters connected together, whichever error amp has a higher output voltage will dominate the other by reverse biasing its output base-emitter junction just as if it was the diode in the block diagram, so to turn one error amplifier off, you simply pull its inverting input higher than its non-inverting input (rather than tying one to ground and one to +5V, use at least 1 pullup/pulldown resistor, bipolar opamps don't like their outputs being pulled hard away from each other).
(You probably already know the following, but I'll write it for completeness.)
Occasionally you get something like a TL494 (or its derivatives) which has an atypical connection of the internal E/A whereby the feedback signal might have to go to the non-inverting input and a divided down reference voltage goes to the inverting input. In this case, you have to think of it as if you're regulating the reference. e.g. type III compensation has a RC network between COMP and IN- pin and an RC across the upper resistor of the reference divider rather than the feedback divider. Those are general purpose PWM chips, you don't often have to worry about this in power supply ICs, but its worth looking through the block diagrams and following which steps invert the signal, which way round the comparator is etc just to make sure. Thinking through following the inversions of a perturbation in the output voltage through to its effect on the switching transistor's duty cycle will tell you whether the output of an optocoupler should be wired as common emitter or common collector, since one inverts and one does not, and this is something which does vary between ICs.
When not using the internal error amp, the way you inject the signal can vary between ICs, but often you will see a representation in the block diagram or even a transistor level schematic of the error amplifier that might tell you that the error amp's output is open emitter or open collector, in which cause you just have to hard wire the error amp's inputs so that this transistor is switched off and inject the signal to its output (generally the COMP pin). e.g. the TL494 datasheet shows diode outputs of the error amplifiers, indicating that the error amplifiers are OR'd as open emitters (see also this app note which has a schematic of the E/A and gives lots of detail about how to use the TL494 with proper OCP, OVP etc
). Since they're open emitters connected together, whichever error amp has a higher output voltage will dominate the other by reverse biasing its output base-emitter junction just as if it was the diode in the block diagram, so to turn one error amplifier off, you simply pull its inverting input higher than its non-inverting input (rather than tying one to ground and one to +5V, use at least 1 pullup/pulldown resistor, bipolar opamps don't like their outputs being pulled hard away from each other).